- 7 FPGA KC705評估開發(fā)方案

圖3. Kintex-7 FPGA系列在視頻IP網關的應用框圖

Kintex-7 FPGA系列評估板KC705

The KC705 evaluation board for the Kintex™-7 FPGA provides a hardware environment for developing and evaluating designs targeting the Kintex-7 XC7K325T-2FFG900C FPGA. The KC705 board provides features common to many embedded processing systems, including a DDR3 SODIMM memory, an 8-lane PCI Express® interface, a tri-mode Ethernet PHY, general purpose I/O, and a UART interface. Other features can be added by using mezzanine cards attached to either of two VITA-57 FPGA mezzanine connectors (FMC) provided on the board. High pin count (HPC) and low pin count (LPC) FMCs are provided.

評估板KC705主要特性:

• Kintex-7 XC7K325T-2FFG900C FPGA

• 1 GB DDR3 memory SODIMM

• 128 MB Linear BPI Flash memory

• 128 Mb Quad-SPI Flash memory

• Secure Digital (SD) connector

• USB JTAG via Digilent module

• Clock Generation

• Fixed 200 MHz LVDS oscillator (differential)

• I2C programmable LVDS oscillator (differential)

• SMA connectors (differential)

• SMA connectors for GTX transceiver clocking

• GTX transceivers

• FMC HPC connector (four GTX transceivers)

• FMC LPC connector (one GTX transceiver)

• SMA connectors (one pair each for TX, RX and REFCLK)

• PCI Express (eight lanes)

• Small form-factor pluggable plus (SFP+) connector

• Ethernet PHY SGMII interface (RJ-45 connector)

• PCI Express endpoint connectivity

• Gen1 8-lane (x8)

• Gen2 8-lane (x8)

• SFP+ Connector

• 10/100/1000 tri-speed Ethernet PHY

• USB-to-UART bridge

• HDMI codec

• I2C bus

• I2C MUX

• I2C EEPROM (1 KB)

• USER I2C programmable 3.3V LVDS oscillator

• DDR3 SODIMM socket

• HDMI codec

• FMC HPC connector

• FMC LPC connector

• SFP+ connector

• I2C programmable jitter-attenuating precision clock multiplier

• Status LEDs

• Ethernet status

• Power good

• FPGA INIT

• FPGA DONE

• User I/O

• USER LEDs (eight GPIO)

• User pushbuttons (five directional)

• CPU reset pushbutton

• User DIP switch (4-pole GPIO)

• User SMA GPIO connectors (one pair)

• LCD character display (16 characters x 2 lines)

• Switches

• Power on/off slide switch

• Configuration mode DIP switch

• VITA 57.1 FMC HPC Connector

• VITA 57.1 FMC LPC Connector

• Power management

• PMBus voltage and current monitoring via TI power controller

• XADC header

• Configuration options

• Linear BPI Flash memory

• Quad SPI

• USB JTAG configuration port

• Platform cable header JTAG configuration port

2012-2-7 12:35:46 上傳

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圖4.評估板KC705方框圖

2012-2-7 12:35:46 上傳

下載附件 (58.03 KB)