• AD5694R

• EVAL-AD5694RSDZ

This document presents the steps to setup an environment for using the EVAL-AD5694RSDZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5694RSDZ Evaluation Board with the Xilinx KC705 board.

Below is presented a picture of SDP-B Controller Board with the EVAL-AD5694RSDZ Evaluation Board.

The EVAL-AD5694RSDZ evaluation board is designed to help customers quickly prototype new AD5694R/ AD5694R circuits and reduce design time.

The AD5694R nanoDAC is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.

• AD5694R Product Info - pricing, samples, datasheet
• EVAL-AD5694RSDZ evaluation board user guide
• Xilinx KC705 FPGA board

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

• Xilinx KC705 FPGA board
• FMC-SDP adapter board
• EVAL-AD5694R evaluation board

• Xilinx ISE 14.6.
• UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.
• The EVAL-AD5694R reference project for Xilinx KC705 FPGA.

• Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
• Connect the JTAG and UART cables to the KC705 and power up the FPGA board.

The following commands were implemented in this version of EVAL-AD5694R reference project for Xilinx KC705 FPGA board.

Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.

The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral.