IEEE802.16接收機(jī)檢測(cè)模塊的FPGA 實(shí)現(xiàn)

提出了一種采用現(xiàn)場(chǎng)可編程門(mén)陣列器件FPGA 實(shí)現(xiàn)802.16 接收端MIMO(多輸入多輸
出)2×2 檢測(cè)的方案。在C 語(yǔ)言平臺(tái)對(duì)基于并行干擾消除的最小均方誤差的算法進(jìn)行研究和仿真后，使用Verilog 硬件描述語(yǔ)言對(duì)MIMO 檢測(cè)各模塊分別設(shè)計(jì)；均通過(guò)了綜合和驗(yàn)證；這樣本文提出了對(duì)系統(tǒng)起重要作用的接收端的MIMO 檢測(cè)芯片的實(shí)現(xiàn)方法。
關(guān)鍵詞：現(xiàn)場(chǎng)可編程門(mén)陣列；多輸入多輸出；最小均方誤差；空時(shí)塊碼
Abstract: An MIMO(Multiple Input Multiple Output) detection chip is designed by using FPGA based on the IEEE 802.16 standard. The PIC-MMSE algorithm is developed and simulated on C language platform. Each module of MIMO detection chip is designed by Verilog HDL and the function of the whole system is verified by simulation and synthesis. Thus a concise method is discussed for implementation of MIMO detection, which is of vital importance to the broadband wireless access system.
Keywords：FPGA ; Multiple Input Multiple Output; MMSE; Space Time Block Code