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電子發(fā)燒友網(wǎng)>電子資料下載>可編程邏輯>FPGA/ASIC>高速FPGA印制電路板設(shè)計指南

高速FPGA印制電路板設(shè)計指南

2009-03-28 | rar | 333 | 次下載 | 5積分

資料介紹

高速FPGA印制電路板設(shè)計指南

Over the past five years, the development of true analog CMOS processes
has led to the use of high-speed analog devices in the digital arena.
System speeds of 150 MHz and higher have become common for digital
logic. Systems that were considered high end and high speed a few years
ago are now cheaply and easily implemented. However, this integration
of fast system speeds brings with it the challenges of analog system
design to a digital world. This document is a guideline for printed circuit
board (PCB) layouts and designs associated with high-speed systems.
“High speed” does not just mean faster communication rates (e.g., faster
than 1 gigabit per second (Gbps)). A transistor-transistor logic (TTL)
signal with a 600-ps rise time is also considered a high-speed signal. This
opens up the entire PCB to careful and targeted board simulation and
design. The designer must consider any discontinuities on the board. The
“Time-Domain Reflectometry” and “Discontinuity” sections explain how
to eliminate discontinuities on a PCB. Some sources of discontinuities are
vias, right angled bends, and passive connectors.

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