AD9558,pdf datasheet (可編程的抖動衰減型時(shí)鐘轉(zhuǎn)換器)

The AD9558 provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9558 generates an output clock synchronized to one of up to four external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The AD9558 continuously generates a clean (low jitter), valid output clock even when all references have failed by means of a digitally controlled loop and holdover circuitry.

The AD9558 operates over an industrial temperature range of ?40°C to +85°C.

APPLICATIONS
Network synchronization including synchronous Ethernet and SDH to OTN mapping / demapping
Cleanup of reference clock jitter
Frame Sync Support
SONET/SDH clocks up to OC-192, including FEC
Stratum 3 holdover, jitter cleanup, and phase transient control
Wireless base station controllers
Cable infrastructure
Data communications