CD74HCT4511 高速 CMOS 邏輯 BCD 至 7 段鎖存器/解碼器/驅(qū)動器

數(shù)據(jù)： CD54HC4511, CD74HC4511, CD74HCT4511 數(shù)據(jù)表

描述

CD54HC4511，CD74HC4511和CD74HCT4511是BCD至7段鎖存器/解碼器/驅(qū)動器，具有四個地址輸入（D ₀ ?? D ₃），有效低消隱（BL）\輸入，燈測試（LT）\輸入和鎖存使能（LE）\輸入，當高電平時，使能用于存儲BCD輸入的鎖存器。當LE \為低電平時，鎖存器被禁用，使輸出對BCD輸入透明。

這些器件具有標準尺寸的輸出晶體管，但能夠輸出（標準V _{OH < /sub>水平）4.5 V時最高7.5 mA.HC類型可在6 V時提供高達10 mA的電流。}

特性

2-V to 6-V V_CC Operation (?HC4511)
4.5-V to 5.5-V V_CC Operation (CD74HCT4511)
High-Output Sourcing Capability
- 7.5 mA at 4.5 V (CD74HCT4511)
- 10 mA at 6 V (?HC4511)
Input Latches for BCD Code Storage
Lamp Test and Blanking Capability
Balanced Propagation Delays and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
?HC4511
- High Noise Immunity, N_IL or N_IH = 30% of V_CC at V_CC = 5 V
CD74HCT4511
- Direct LSTTL Input Logic Compatibility, V_IL = 0.8 V Maximum, V_IH = 2 V Minimum
- CMOS Input Compatibility, I_I 1 μA at V_OL, V_OH

參數(shù) 與其它產(chǎn)品相比?編碼器和解碼器

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Function
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Channels (#)
Voltage (Nom) (V)
F @ Nom Voltage (Max) (Mhz)
ICC @ Nom Voltage (Max) (mA)
tpd @ Nom Voltage (Max) (ns)
Configuration
Type
IOL (Max) (mA)
IOH (Max) (mA)
Rating
Operating Temperature Range (C)
Package Group
Package Size: mm2:W x L (PKG)
Bits (#)
Digital input leakage (Max) (uA)
ESD Charged Device Model (kV)
ESD HBM (kV)
?

CD74HCT4511
Decoder Demultiplexer ? ?
HCT ? ?
4.5 ? ?
5.5 ? ?
1 ? ?
5 ? ?
25 ? ?
0.08 ? ?
25 ? ?
4:7 ? ?
Standard ? ?
4 ? ?
-4 ? ?
Catalog ? ?
-55 to 125 ? ?
PDIP ? ?
See datasheet (PDIP) ? ?
7 ? ?
5 ? ?
0.75 ? ?
2 ? ?