關(guān)于減少LCD Driver IC芯片制造成本的方法分析和指南

LCD驅(qū)動器制造商對成本是非常敏感的，有客戶找到公司希望降低芯片尺寸10%，以恢復(fù)成本競爭力和市場份額。ESD的魯棒性不是一個問題，但芯片尺寸（包括ESD面積）是一個挑戰(zhàn)。

Most of the manufacturer’s products achieved protection levels of 2kV HBM and 200V MM. A re-spin for ESD was required in only a limited number of cases. ESD protection was provided through a simple but effective dual diode plus power clamp approach, but even that consumed too much area.

大多數(shù)的制造商的產(chǎn)品達到保護靜電水平2KV HBM和200V MM。目前，很多廠商采用的ESD保護方案就是提供一個簡單但有效的雙二極管加電源鉗的方法。當(dāng)然這個方案是解決了ESD問題，可是帶來的問題是顯而易見的，那就是消耗過多的芯片面積。

Sofics studied the process and the application. We optimized the diode size and layout, reduced the I/O bus scheme and area, designed a new Sofics power clamp, and worked out a calculation sheet to determine optimum power clamp placement. This resulted in a 25% I/O size reduction, and an overall die area reduction of more than 12%, significantly cutting the product’s manufacturing cost.

在研究客戶的工藝及應(yīng)用后，公司優(yōu)化了二極管的規(guī)模和布局，減少了I/O總線方案和面積，同時設(shè)計了一種新的SOFICS電源鉗位，通過電源鉗位位置計算表獲得最佳的布局。這個改動帶來了25% I/O尺寸減少，整體芯片面積也減少了12%以上，大大降低了產(chǎn)品的制造成本。

Porting to the customer’s process and first product verification was completed within one silicon cycle, only 6 months from the start of the project. Immediately afterwards the first new LCD driver IC using the Sofics small area solution was released for mass production.

移植到客戶的過程和第一產(chǎn)品驗證也在一個硅周期內(nèi)完成，從項目開始，總共只有6個月。緊接著第一個新的使用小面積LCD驅(qū)動IC的解決方案發(fā)布量產(chǎn)。

In addition to the die area reduction, our solution removed one mask and one step from the process, further reducing costs. It also established a design process for other ICs in the technology. Since the Sofics engagement the customer has been able to make consistently smaller I/O’s and power cells, and has reduced the power clamp repetition rate. These enhancements lead to smaller and hence cheaper product dies. The customer has been rewarded with significantly increased competitiveness and a bigger market share.

除了芯片面積減少，我們的解決方案從工藝過程中刪除了一個MASK（光罩）從而進一步降低成本。通過新的流程，公司還幫客戶建立了其他IC電路的ESD設(shè)計，使整個系列產(chǎn)品線受益。由于公司的參與，使得客戶已經(jīng)能夠使用一致的I / O和POWER CELL，降低了電源鉗位使用的重復(fù)率。這些改善，讓客戶的芯片以更小的面積，更高的性價比進入市場，從而獲得了顯著的競爭力提升和更大的市場份額。