基于PCI總線的開(kāi)放性接口設(shè)計(jì)

采用可編程邏輯器件CPLD，分四個(gè)模塊——控制寄存器模塊、PCI控制器狀態(tài)機(jī)模塊、SRAM 控制器模塊和仲裁器模塊，分別完成通信并解析PCI總線、PCI狀態(tài)的控制和翻轉(zhuǎn)、負(fù)責(zé)SRAM接口數(shù)據(jù)的讀寫(xiě)與數(shù)據(jù)交換、PCI 設(shè)備的仲裁機(jī)制等來(lái)實(shí)現(xiàn)PCI 接口，可連接各種PCI 接口的現(xiàn)場(chǎng)通信卡，提高了系統(tǒng)的開(kāi)放性。
關(guān)鍵詞：總線；接口；可編程邏輯器件；開(kāi)放性 The design of opening interface based on PCI local bus Liu Zhewei1 JinWenbin1 Yan Jianjun1 Wang Xiaoxia2 (Zhejiang Institute of Mechanical & Electrical Engineering,Hangzhou1 ,310053, Hangzhou Zhengu Science and Technology Ltd2,310020) Abstract: The PCI interface is based on CPLD, it is divided into four modules , Control of register module realize communication , PCI controller state module, SRAM controller module and Arbitration module. they carry on correspondence and analyse PCI bus, control PCI state, write-read and exchange with data from SRAM interface, arbitrate PCI device respectively. It may link various communication cards with PCI interface, and improves the systematic openness.
Key words：Bus; Interface; CPLD; Openness