三個8位微控制器8XC51RA 8XC51RB 8XC51R

1.0 INTRODUCTION? 1
2.0 MEMORY ORGANIZATION? 1
2.1 Program Memory? 1
2.2 Data Memory? 1
3.0 SPECIAL FUNCTION
REGISTERS? 4
4.0 PORT STRUCTURES AND
OPERATION? 6
4.1 I/O Configurations? 6
4.2 Writing to a Port? 7
4.3 Port Loading and Interfacing? 9
4.4 Read-Modify-Write Feature? 9
4.5 Accessing External Memory? 9
5.0 TIMERS/COUNTERS? 11
5.1 Timer 0 and Timer 1? 11
5.2 Timer 2? 14
6.0 SERIAL INTERFACE? 18
6.1 Framing Error Detection? 19
6.2 Multiprocessor Communications? 19
6.3 Automatic Address Recognition? 19
6.4 Baud Rates? 25
6.5 Using Timer 1 to Generate Baud
Rates? 25
6.6 Using Timer 2 to Generate Baud
Rates? 25
CONTENTS PAGE
7.0 HARDWARE WATCHDOG TIMER
(ONE-TIME ENABLED WITH RESETOUT)
?23
7.1 Using the WDT? 23
7.2 WDT during Power Down and
Idle? 23
8.0 INTERRUPTS? 24
8.1 External Interrupts? 25
8.2 Timer Interrupts? 25
8.3 Serial Port Interrupt? 25
8.4 Interrupt Enable? 25
8.5 Priority Level Structure? 31
8.6 Response Time? 29
9.0 RESET? 29
9.1 Power-On Reset? 30
10.0 POWER-SAVING MODES OF
OPERATION? 30
10.1 Idle Mode? 30
10.2 Power Down Mode? 32
10.3 Power Off Flag? 32
11.0 ALE DISABLE? 32
12.0 EPROM VERSIONS? 32
13.0 PROGRAM MEMORY LOCK? 32
14.0 ONCE MODE? 33
15.0 ON-CHIP OSCILLATOR? 34
16.0 CPU TIMING? 35