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電子發(fā)燒友網(wǎng)>電子資料下載>電源技術(shù)>50兆赫80分貝解調(diào)帶限幅輸出的對數(shù)放大器AD606數(shù)據(jù)表

50兆赫80分貝解調(diào)帶限幅輸出的對數(shù)放大器AD606數(shù)據(jù)表

2017-10-19 | rar | 0.47 MB | 次下載 | 免費

資料介紹

  The AD606 is a complete, monolithic logarithmic amplifier using a 9-stage “successive-detection” technique. It provides both logarithmic and limited outputs. The logarithmic output is from a three-pole post-demodulation low-pass filter and provides a loadable output voltage of +0.1 V dc to +4 V dc. The logarithmic scaling is such that the output is +0.5 V for a sinusoidal input of –75 dBm and +3.5 V at an input of +5 dBm; over this range the logarithmic linearity is typically within ±0.4 dB. All scaling parameters are proportional to the supply voltage. The AD606 can operate above and below these limits, with reduced linearity, to provide as much as 90 dB of conversion range. A second low-pass filter automatically nulls the input offset of the first stage down to the submicrovolt level. Adding external capacitors to both filters allows operation at input frequencies as low as a few hertz. The AD606’s limiter output provides a hard-limited signal output as a differential current of ±1.2 mA from open-collector outputs. In a typical application, both of these outputs are loaded by 200 ? resistors to provide a voltage gain of more than 90 dB from the input. Transition times are 1.5 ns, and the phase is stable to within ±3° at 10.7 MHz for signals from –75 dBm to +5 dBm. The logarithmic amplifier operates from a single +5 V supply and typically consumes 65 mW. It is enabled by a CMOS logic level voltage input, with a response time of 《5 μs. When disabled, the standby power is reduced to 《1 mW within 5 μs. The AD606J is specified for the commercial temperature range of 0°C to +70°C and is available in 16-lead plastic DIPs or SOICs. Consult the factory for other packages and temperature ranges.
50兆赫80分貝解調(diào)帶限幅輸出的對數(shù)放大器AD606數(shù)據(jù)表

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