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電子發(fā)燒友網(wǎng)>電子資料下載>IC datasheet pdf>UC3823A,UC3823B/UC3825A,UC3825

UC3823A,UC3823B/UC3825A,UC3825

2009-05-12 | rar | 333 | 次下載 | 10積分

資料介紹

UC3823A,UC3823B/UC3825A,UC3825B pdf, datasheet

The UC3823A & B and the UC3825A & B family of PWM control ICs are improved
versions of the standard UC3823 & UC3825 family. Performance enhancements
have been made to several of the circuit blocks. Error amplifier gain
bandwidth product is 12MHz while input offset voltage is 2mV. Current limit
threshold is guaranteed to a tolerance of 5%. Oscillator discharge current is specified
at 10mA for accurate dead time control. Frequency accuracy is improved
to 6%. Startup supply current, typically 100mA, is ideal for off-line applications.
The output drivers are redesigned to actively sink current during UVLO at no
expense to the startup current specification. In addition each output is capable
of 2A peak currents during transitions.
Functional improvements have also been implemented in this family. The
UC3825 shutdown comparator is now a high-speed overcurrent comparator with
a threshold of 1.2V. The overcurrent comparator sets a latch that ensures full
discharge of the soft start capacitor before allowing a restart. While the fault latch
is set, the outputs are in the low state. In the event of continuous faults, the soft
start capacitor is fully charged before discharge to insure that the fault frequency
does not exceed the designed soft start period. The UC3825 Clock pin has become
CLK/LEB. This pin combines the functions of clock output and leading
edge blanking adjustment and has been buffered for easier interfacing.

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