積分器：Integrator

The integrator is shown in Figure 9 and performs the mathematical operation of integration. This circuit is essentially a low-pass filter with a frequency response decreasing at 6 dB per octave. An amplitude-frequency plot is shown in Figure 10. The circuit must be provided with an external method of establishing initial conditions. This is shown in the figure as S1. When S 1 is in position 1, the amplifier is connected in unity-gain and capacitor C1 is discharged, setting an initial condition of zero volts. When S1 is in position 2, the amplifier is connected as an integrator and its output will change in accordance with a constant times the time integral of the input voltage. The cautions to be observed with this circuit are tw the amplifier used should generally be stabilized for unity-gain operation and R2 must equal R1 for minimum error due to bias current.

積分器用于實現(xiàn)數(shù)學(xué)上的積分運算，如圖9所示。在本質(zhì)上，積分器可以看成是一個呈6dB/2倍頻程頻率特性的LPF，波特圖見圖10。積分器必須加入初始化電路，以給電路創(chuàng)造積分的初始化條件。圖中S1的目的就在于此，當(dāng)S1在1位置時，OP工作在單位增益（跟隨器）狀態(tài)。電容C1上的電荷被釋放掉，使得積分初始值為0；當(dāng)S1在2位置時，OP工作在積分器狀態(tài)，其輸出將為輸入信號電壓幅度對時間的積分與一個常數(shù)之積。在使用本電路時注意兩點：OP在單位增益狀態(tài)下應(yīng)能穩(wěn)定，R1和R2的阻值必須相等，以減小輸入偏置電流所帶來的誤差。