ADI公司的ADGS1408/ADGS1409是包含有八個(gè)單路和四個(gè)差分通路的模擬復(fù)接器,SPI接口控制模擬開關(guān),具有很好的誤差檢測(cè)特性如循環(huán)冗余檢查(CRC)誤差檢測(cè),無(wú)效讀/寫地址檢測(cè),以及SCLK計(jì)數(shù)誤差檢測(cè)。支持突發(fā)模式和菊花鏈模式,工作電壓±15 V,±5 V和+12 V,25℃時(shí)的開態(tài)電阻4Ω,主要用在自動(dòng)測(cè)試設(shè)備(ATE),數(shù)據(jù)采集系統(tǒng),通信系統(tǒng),取樣和保持系統(tǒng),音頻信號(hào)路由,視頻信號(hào)路由,電池為能源系統(tǒng),以及繼電器替代品。本文介紹了ADGS1408/ADGS1409產(chǎn)品亮點(diǎn)和主要特性,功能框圖,以及EVAL-ADGS1408SDZ/EVAL-ADGS1409SDZ主要特性,電路圖,材料清單和PCB設(shè)計(jì)圖。
The ADGS1408/ADGS1409 are analog multiplexers comprising eight single channels and four differential channels, respectively. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features such as cyclic redundancy check (CRC) error detection, invalid read/write address detection, and SCLK count error detection. It is possible to daisy-chain multiple ADGS1408/ADGS1409 devices together. Daisy-chain mode enables the configuration of multiple devices with a minimal amount of digital lines. The ADGS1408/ADGS1409 can also operate in burst mode to decrease the time between SPI commands. iCMOS construction ensures ultra low power dissipation, making the devices ideally suited for portable and battery-powered instruments. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. The on-resistance profile is flat over the full analog input range, which ensures linearity and low distortion when switching audio signals.
ADGS1408/ADGS1409產(chǎn)品亮點(diǎn):
1. SPI interface removes the need for parallel conversion, logic traces, and reduces GPIO channel count.
2. Daisy-chain mode removes additional logic traces when multiple devices are used.
3. CRC error detection, invalid read/write address detection, and SCLK count error detection ensure a robust digital interface.
4. CRC and error detection capabilities allow the use of the ADGS1408/ADGS1409 in safety critical systems. 5. Minimal distortion.
ADGS1408/ADGS1409主要特性:
SPI interface with error detection
Includes CRC, invalid read/write address, and SCLK count error detection
Supports burst mode and daisy-chain mode
Industry-standard SPI Mode 0 and SPI Mode 3 interface compatible
Round robin mode allows switching times comparable with a parallel interface
General-purpose digital outputs to control other devices, such as parallel switches from Analog Devices, Inc.
4 Ω typical on resistance at 25℃
0.5 Ω typical on-resistance flatness at 25℃
0.2 Ω typical on-resistance match between channels at 25°C VSS to VDD analog signal range
Fully specified at ±15 V, ±5 V, and +12 V
Power-up sequence of VDD, VSS, and GND before applying VL and digital/analog inputs
1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V
24-lead LFCSP package
ADGS1408/ADGS1409應(yīng)用:
Automated test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communications systems
Relay replacement
圖1.ADGS1408功能框圖
圖2.ADGS1409功能框圖
圖3.ADGS1408控制ADG758電路圖
評(píng)估板EVAL-ADGS1408SDZ/EVAL-ADGS1409SDZ
The EVAL-ADGS1408SDZ/EVAL-ADGS1409SDZ are theevaluation boards for the ADGS1408/ADGS1409. TheADGS1408/ADGS1409 are low RON, 8:1/dual 4:1 multiplexerscontrolled by a serial peripheral interface (SPI)。 The SPI has robust error detection features, including cyclic redundancy check (CRC) error detection, invalid read/write addressdetection, and serial clock (SCLK) count error detection. It ispossible to daisy-chain multiple ADGS1408/ADGS1409 devicestogether to enable the configuration of multiple devices with aminimal amount of digital lines. The ADGS1408/ADGS1409also support burst mode, which decreases the time between SPI commands. Figure 1 and Figure 2 shows the EVAL-ADGS1408SDZ/EVAL-ADGS1409SDZ board photographs. The EVAL-ADGS1408SDZ/ EVAL-ADGS1409SDZ are controlled by the EVAL-SDP-CB1Zsystem demonstration platform (SDP), which connects to a PC via a USB port. The ADGS1408/ADGS1409 is on the center of the evaluation board, and wire screw terminals are provided to connect to each of the source and drain pins. Three screwterminals power the device and, if required, a fourth terminal provides users with a defined digital logic supply voltage.
Alternatively, the digital logic supply voltage can be supplied from the SDP-B board. Consult the ADGS1408/ADGS1409 data sheet (available from Analog Devices, Inc.) in conjunction with this user guide when working with the evaluation board. The evaluation board interfaces to the USB port of a PC via the SDP-B board. The SDP-B controller board (EVAL-SDP-CB1Z)is available for order at
EVAL-ADGS1408SDZ/EVAL-ADGS1409SDZ主要特性:
SPI interface with error detection
Includes CRC error detection, invalid read/write addressdetection, and SCLK count error detection Analog supply voltages
Dual supply: ±15 V Single supply: 12 V PC control in conjunction with evaluation software EVALUATION KIT CONTENTS EVAL-ADGS1408SDZ/EVAL-ADGS1409SDZ
圖4.EVAL-ADGS1408SDZ外形圖
圖5.EVAL-ADGS1409SDZ外形圖
圖6.EVAL-ADGS1408SDZ電路圖-主器件(1)
圖7.EVAL-ADGS1408SDZ電路圖-主器件(2)
圖8.EVAL-ADGS1408SDZ電路圖-電源和硬件重置
圖9.EVAL-ADGS1408SDZ電路圖-SDP連接器
圖10.EVAL-ADGS1408SDZ PCB設(shè)計(jì)圖-絲印
圖11.EVAL-ADGS1408SDZ PCB設(shè)計(jì)圖-頂層
圖12.EVAL-ADGS1408SDZ PCB設(shè)計(jì)圖-層2
圖13.EVAL-ADGS1408SDZ PCB設(shè)計(jì)圖-層3
圖14.EVAL-ADGS1408SDZ PCB設(shè)計(jì)圖-底層
圖15.EVAL-ADGS1409SDZ電路圖-主器件(1)
圖16.EVAL-ADGS1409SDZ電路圖-主器件(2)
圖17.EVAL-ADGS1409SDZ電路圖-電源和硬件重置
圖18.EVAL-ADGS1409SDZ電路圖-SDP連接器
EVAL-ADGS1408/9SDZ材料清單:
圖19.EVAL-ADGS1409SDZ PCB設(shè)計(jì)圖-絲印
圖20.EVAL-ADGS1409SDZ PCB設(shè)計(jì)圖-頂層
圖21.EVAL-ADGS1409SDZ PCB設(shè)計(jì)圖-層2
圖22.EVAL-ADGS1409SDZ PCB設(shè)計(jì)圖-層3
圖23.EVAL-ADGS1409SDZ PCB設(shè)計(jì)圖-底層
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