RISC-V的中斷處理 中斷操作三個(gè)步驟

中斷操作三個(gè)步驟：

1、中斷初始化

void intr_init(){  //configure PLIC    //cpu 0 accept all interrupts with priority above 0  plic_set_threshold(BSP_PLIC, BSP_PLIC_CPU_0, 0);   //enable SYSTEM_PLIC_USER_INTERRUPT_A_INTERRUPT rising edge interrupt#ifdef SYSTEM_AXI_A_BMB
  plic_set_enable(BSP_PLIC, BSP_PLIC_CPU_0, SYSTEM_PLIC_SYSTEM_AXI_A_INTERRUPT, 1);  plic_set_priority(BSP_PLIC, SYSTEM_PLIC_SYSTEM_AXI_A_INTERRUPT, 1);
#endif    //enable interrupts    //Set the machine trap vector (../common/trap.S)  csr_write(mtvec, trap_entry);     //Enable external interrupts  csr_set(mie, MIE_MEIE);   csr_write(mstatus, MSTATUS_MPP | MSTATUS_MIE);}

其中包括設(shè)置中斷門限。相應(yīng)中斷的使能，以及中斷的優(yōu)先級(jí)，數(shù)字越大，優(yōu)先級(jí)越高。然后還有中斷入中數(shù)據(jù)的保存。

2、trap處理

void trap(){  int32_t mcause    = csr_read(mcause);    //Interrupt if true, exception if false  int32_t interrupt = mcause < 0;      int32_t cause     = mcause & 0xF;  if(interrupt){    switch(cause){    case CAUSE_MACHINE_EXTERNAL: axiInterrupt(); break;    default: crash(); break;    }  } else {    crash();  }}

3、用戶中斷處理

void axiInterrupt(){

  uint32_t claim;  //While there is pending interrupts  while(claim = plic_claim(BSP_PLIC, BSP_PLIC_CPU_0)){switch(claim){#ifdef SYSTEM_AXI_A_BMB

    case SYSTEM_PLIC_SYSTEM_AXI_A_INTERRUPT:            bsp_print("Entered AXI Interrupt Routine, Passed!");       break;

#endif    default: crash(); break;    }        //unmask the claimed interrupt    plic_release(BSP_PLIC, BSP_PLIC_CPU_0, claim);   }}