工作中遇到的多核 ARM CPU 越來越多,總結(jié)分享一些多核啟動(dòng)的知識(shí),希望能幫助更多小伙伴。
在 ARM64 架構(gòu)下如果想要啟動(dòng)多核,有 spin-table 和 psci 兩種方式,下面針對(duì)這兩種啟動(dòng)流程進(jìn)行分析。
代碼版本
- boot-wrapper-aarch64 version : 28932c41e14d730b8b9a7310071384178611fb32
- linux v5.14
多核 CPU 的啟動(dòng)方式
嵌入式系統(tǒng)的啟動(dòng)的基本流程是先運(yùn)行 bootloader
,然后由 bootloader
引導(dǎo)啟動(dòng) kernel,這里無論啟動(dòng)的是 rt-thread 或者是 linux 原理都是一樣的。
上電后所有的 CPU
都會(huì)從 bootrom
里面開始執(zhí)行代碼,為了防止并發(fā)造成的一些問題,需要將除了 primary cpu
以外的 cpu
攔截下來,這樣才能保證啟動(dòng)的順序是可控的。
spin-table 啟動(dòng)方法
在啟動(dòng)的過程中,bootloader
中有一道柵欄,它攔住了除了 cpu0
外的其他 cpu
。cpu0
直接往下運(yùn)行,進(jìn)行設(shè)備初始化以及運(yùn)行 Kernel
。其他 cpu0
則在柵欄外進(jìn)入睡眠狀態(tài)。
cpu0
在初始化 smp
的時(shí)候,會(huì)在 cpu-release-addr
里面填入一個(gè)地址并喚醒其他 cpu
。這時(shí)睡眠的 cpu
接收到信號(hào),醒來的時(shí)候會(huì)先檢查 cpu-release-addr
這個(gè)地址里面的數(shù)據(jù)是不是有效。如果該地址是有效的(非 0 ),意味著自己需要真正開始啟動(dòng)了,接下來他會(huì)跳轉(zhuǎn)到。
下面我們看看 arm64
里面的實(shí)現(xiàn),在 arch/arm64/boot/dts/xxx.dts
中有如下描述:
1cpu@0 {
2 device_type = "cpu";
3 compatible = "arm,armv8";
4 reg = < 0x0 0x0="" >;
5 enable-method = "spin-table"; /* 選擇使用 spin-table 方式啟動(dòng) */
6 cpu-release-addr = < 0x0 0x8000fff8="" >;
7};
在 arch/arm64/kernel/smp_spin_table.c
中處理了向其他 cpu 發(fā)送信號(hào)的方法:
1、先是獲取 release_addr 的虛擬地址
2、向該地址寫入從 cpu 的入口地址
3、通過 sev() 指令喚醒其他 cpu
1static int smp_spin_table_cpu_prepare(unsigned int cpu)
2{
3 __le64 __iomem *release_addr;
4 phys_addr_t pa_holding_pen = __pa_symbol(function_nocfi(secondary_holding_pen));
5
6 if (!cpu_release_addr[cpu])
7 return -ENODEV;
8
9 /*
10 * The cpu-release-addr may or may not be inside the linear mapping.
11 * As ioremap_cache will either give us a new mapping or reuse the
12 * existing linear mapping, we can use it to cover both cases. In
13 * either case the memory will be MT_NORMAL.
14 */
15 release_addr = ioremap_cache(cpu_release_addr[cpu],
16 sizeof(*release_addr));
17 if (!release_addr)
18 return -ENOMEM;
19
20 /*
21 * We write the release address as LE regardless of the native
22 * endianness of the kernel. Therefore, any boot-loaders that
23 * read this address need to convert this address to the
24 * boot-loader's endianness before jumping. This is mandated by
25 * the boot protocol.
26 */
27 writeq_relaxed(pa_holding_pen, release_addr);
28 dcache_clean_inval_poc((__force unsigned long)release_addr,
29 (__force unsigned long)release_addr +
30 sizeof(*release_addr));
31
32 /*
33 * Send an event to wake up the secondary CPU.
34 */
35 sev();
36
37 iounmap(release_addr);
38
39 return 0;
40}
Bootloader
部分以 boot-wrapper-aarch64
中的代碼做示例,非主 CPU 會(huì)輪詢檢查 mbox(其地址等同cpu-release-addr)中的值,當(dāng)其值為 0 的時(shí)候繼續(xù)睡眠,否則就跳轉(zhuǎn)到內(nèi)核執(zhí)行,代碼如下所示:
1/**
2 * Wait for an address to appear in mbox, and jump to it.
3 *
4 * @mbox: location to watch
5 * @invalid: value of an invalid address, 0 or -1 depending on the boot method
6 * @is_entry: when true, pass boot parameters to the kernel, instead of 0
7 */
8void __noreturn spin(unsigned long *mbox, unsigned long invalid, int is_entry)
9{
10 unsigned long addr = invalid;
11
12 while (addr == invalid) {
13 wfe();
14 addr = *mbox;
15 }
16
17 if (is_entry)
18#ifdef KERNEL_32
19 jump_kernel(addr, 0, ~0, (unsigned long)&dtb, 0);
20#else
21 jump_kernel(addr, (unsigned long)&dtb, 0, 0, 0);
22#endif
23
24 jump_kernel(addr, 0, 0, 0, 0);
25
26 unreachable();
27}
28
29/**
30 * Primary CPU finishes platform initialisation and jumps to the kernel.
31 * Secondaries are parked, waiting for their mbox to contain a valid address.
32 *
33 * @cpu: logical CPU number
34 * @mbox: location to watch
35 * @invalid: value of an invalid address, 0 or -1 depending on the boot method
36 */
37void __noreturn first_spin(unsigned int cpu, unsigned long *mbox,
38 unsigned long invalid)
39{
40 if (cpu == 0) {
41 init_platform();
42
43 *mbox = (unsigned long)&entrypoint;
44 sevl();
45 spin(mbox, invalid, 1);
46 } else {
47 *mbox = invalid;
48 spin(mbox, invalid, 0);
49 }
50
51 unreachable();
52}